A typical field effect transistor (FET) comprises a number of layers and they can be configured in various ways. For example, an FET may comprise a substrate, a dielectric, a semiconductor, source and drain electrodes connected to the semiconductor and a gate electrode. When voltage is applied between the gate and source electrodes, charge carriers are accumulated in the semiconductor layer at its interface with the dielectric resulting in the formation of a conductive channel between the source and the drain and current flows between the source and the drain electrode upon application of potential to the drain electrode.
FET's are widely used as a switching element in electronics, for example, in active-matrix liquid-crystal displays, smart cards, and a variety of other electronic devices and components thereof. The thin film transistor (TFT) is an example of a field effect transistor (FET). The best-known example of an FET is the MOSFET (Metal-Oxide-Semiconductor-FET), today's conventional switching element for high-speed applications. Presently, most thin film devices are made using amorphous silicon as the semiconductor. Amorphous silicon is a less expensive alternative to crystalline silicon. This fact is especially important for reducing the cost of transistors in large-area applications. Application of amorphous silicon is limited to low speed devices, however, since its maximum mobility (0.5-1.0 cm2/V·sec) is about a thousand times smaller than that of crystalline silicon.
Although amorphous silicon is less expensive than highly crystalline silicon for use in TFT's, amorphous silicon still has its drawbacks. The deposition of amorphous silicon, during the manufacture of transistors, requires relatively costly processes, such as plasma enhanced chemical vapor deposition and high temperatures (about 360° C.) to achieve the electrical characteristics sufficient for display applications. Such high processing temperatures disallow the use of substrates, for deposition, made of certain plastics that might otherwise be desirable for use in applications such as flexible displays.
In the past two decades, organic materials have received significant attention as a potential alternative to inorganic materials, such as amorphous silicon, for use in semiconductor channels of FET's. Compared to inorganic materials, that require a high-temperature vacuum process, organic semiconductor materials are simpler to process, especially those that are soluble in organic solvents and, therefore, capable of being applied to large areas by far less expensive processes, such as roll-to-roll coating, spin coating, dip coating and microcontact printing. Furthermore organic materials may be deposited at lower temperatures, opening up a wider range of substrate materials, including plastics, for flexible electronic devices. Accordingly, thin film transistors made of organic materials can be viewed as a potential key technology for plastic circuitry in display drivers, portable computers, pagers, memory elements in transaction cards, and identification tags, where ease of fabrication, mechanical flexibility, and/or moderate operating temperatures are important considerations. However, to realize these goals, OFET semiconductor and dielectric components should ideally be easily manufactured using high-throughput, atmospheric pressure, solution-processing methods such as spin-coating, casting, or printing.
To date in the development of organic field effect transistors (OFET's) considerable efforts have been made to discover new organic semiconductor materials and optimizing properties of such materials. These efforts have been quite fruitful and a number of organic semiconducting materials have been designed and, to a lesser extent, structure-property relationships of such materials have been studied.
Accordingly, fused acenes such as tetracene and pentacene, oligomeric materials containing thiophene or fluorene units, and polymeric materials like regioregular poly(3-alkylthiophene) have been shown to perform in OFET's as “p-type” or “p-channel,” semiconductors—meaning that negative gate voltages, relative to the source voltage, are applied to induce positive charges (holes) in the channel region of the device. Examples of acene and heteroacenes based semiconductors are well known in the prior art.
As an alternative to p-type organic semiconductor materials, n-type organic semiconductor materials can be used in FET's where the terminology “n-type” or “n-channel” indicates that positive gate voltages, relative to the source voltage, are applied to induce negative charges in the channel region of the device. For examples, n-type semiconductors based on diimide materials are known in the art.
The overall performance of an OFET is dependent on a number of factors such as the degree of crystallization and the order of organic semiconductor layers, charge characteristics, and trap density at the interfaces between dielectric and organic semiconductor layers, carrier injection ability of the interfaces between source/drain electrodes and organic semiconductor layers. Although the gate dielectric layer is intended to ensure a sufficiently good electrical insulation between the semiconductor and the gate electrode, it serves an important role in the overall performance of an OFET. In particular, the gate dielectric permits the creation of the gate field and the establishment of the two-dimensional channel charge sheet. Upon application of a source-drain bias, the accumulated charges move very close to the dielectric-semiconductor interface from the source electrode to the drain electrode.
Since the charge flow in an organic semiconductor occurs very close (˜1 nm) to the dielectric interface, it is important to optimize chemical and electrical behavior of the dielectric layer. Besides these factors, the dielectric surface morphology has a great effect on carrier or charge mobility of the semiconductor. The surface morphology of the dielectric material and variations in its surface energies [for example, surface treatment using self-assembled monolayers (SAM's)] have been shown to modify the growth, morphology, and microstructure of the vapor/solution-deposited semiconductor, each of these factors affecting mobility and the current on/off ratio, the latter being the drain-source current ratio between the “on” and “off” states, which is another important FET device parameter. The properties of the dielectric material can also affect the density of state distribution for both amorphous and single-crystal semiconductors.
Known materials used as gate dielectrics in OFET's include both inorganic and organic materials. Inorganic dielectric materials such as silicon oxide (SiO2), silicon nitride (SiNx), aluminum oxide (AlOx), and tantalum oxide (TaOx) are usually deposited using chemical vapor deposition (CVD) and plasma enhanced CVD methods that are high temperatures (>300° C.) processes and not compatible with polymeric substrates. Lower processing temperatures usually lead to poor quality films with pinholes, resulting in poor insulating properties. As a result, it is necessary to use thick layers (more than 100 nm) to ensure sufficient insulator properties that result in increased supply voltages for the operation of such circuits. Another widely used process is ion beam deposition, but it requires high vacuum and expensive equipment that are incompatible with the goal of very low cost production. Similarly, the use of other high dielectric constant inorganic materials such as barium zirconate titanate (BZT) and barium strontium titanate (BST) need either a high firing temperature (400° C.) for the sol-gel process, or radiofrequency magnetron sputtering, which also requires vacuum equipment, and can also have stoichiometric problems.
In addition to higher temperature processing, the inorganic insulating layers generally require interfacial modification before they can be used with organic semiconductor. It has been shown that the presence of polar functionalities (like hydroxy groups on a SiO2 surface) at the dielectric-organic semiconductor interface trap charges, which results in lowers carrier mobility in organic semiconductors. This is especially true for n-type organic semiconductors and OFET devices comprising n-type semiconductors. For example, a silicon dioxide dielectric surface is commonly functionalized with long alkyl chain silanes [commonly octadodecyl trichlorosilane (OTS)] using a solution phase self assembly process. This results in a low energy dielectric surface with very few chemical defects or reactive functionalities that could adversely affect the OFET device performance.
Most organic materials used in OFET's cannot withstand the high processing temperatures used with known inorganic materials. For example, the 200+° C. temperatures needed to process conventional inorganic materials would at the very least cause a polymeric substrate to deform, and might cause further breakdown of the polymer or even ignition at high enough temperatures. Deformation is highly undesirable, since each layer of the structure has to be carefully registered with the layers below it, which becomes difficult or impossible when the layers below it are deformed due to processing temperatures.
As an alternative to inorganic gate dielectrics, it has been proposed to use insulating polymers for fabrication of OFET's. Polymers generally have the advantage that they can be processed at relatively low temperatures of below approximately 200° C. However, compared to inorganic dielectrics, the insulating property of thin layers of polymeric dielectrics is usually poor on account of leakage currents. Hence, comparatively thick layers (more than 100 nm) of polymeric dielectrics are usually employed in fabrication of OFET's. As a consequence, integrated circuits having OFET's with polymeric gate dielectrics require the use of comparatively high supply voltages. In pentacene layers deposited on polymeric dielectrics, the mobility of the charge carriers is similar or higher in comparison with inorganic dielectrics.
A number of polymers have been used as gate dielectrics in OFET's. Halik et al. (Journal of Applied Physics 93, 2977 (2003)) describe the use of poly(vinyl phenol) (PVP) that is thermally cross-linked with polymelamine-co-formaldehyde as a gate dielectric layer to make p-type OFET's. However, this attempt is limited since a high temperature of about 200° C. is required to attain crosslinking. Similarly, U.S. Patent Application Publication 2010-0084636 (Lin et al.) describes a photosensitive dielectric material comprising a poly(vinyl phenol) based polymer, a crosslinking agent, and a photoacid generator. However, the presence of acid is not desirable since it could have deleterious effect on the performance of OFET's.
U.S. Pat. No. 7,298,023 (Guillet et al.) describes the use of organic insulator (or dielectric) comprising a base copolymer of PVDC-PAN-PMMA having the general formula (—CH2Cl2—)x—(—CH2CH(CN)—)y—(CH2C(CH3)(CO2CH3))z, wherein x, y, z, in each case (independently from one another) may assume values between 0 and 1, for use in OFET's and organic capacitors. However, the presence of polar groups at the dielectric interface creates dipolar disorder that lowers the carrier mobility.
U.S. Patent Application Publication 2008-0283829 (Kim et al.) discloses an organic insulator composition comprising a crosslinking agent and a hydroxyl group-containing oligomer or hydroxyl group-containing polymer. However, the presence of hydroxyl groups at the organic semiconductor gate dielectric interface is not desirable as hydroxyl trap charges.
U.S. Pat. No. 6,232,157 (Dodabalapur et al.) discloses the use of a polyimide as material for organic insulating films. U.S. Pat. No. 7,482,625 (Kim et al.) discloses a thermosetting composition for organic polymeric gate insulating layer in OFET's. U.S. Pat. No. 7,482,625 also describes blending polyvinyl phenol with another polymer in consideration of physical, chemical, and electrical characteristics. The polymers that can be blended include polyacrylates, poly(vinyl alcohol), polyepoxys, polystyrene, and poly(vinyl pyrrolidone). U.S. Pat. No. 7,741,635 (Kim et al.) describes photo-crosslinkable polymer dielectric composition comprising an insulating organic polymer such as poly(methyl methacrylate) (PMMA), poly(vinyl alcohol) (PVA), poly(vinyl pyrrolidone) (PVP), or poly(vinyl phenol) (PVPh) and a copolymer thereof, a crosslinking monomer having two or more double bonds, and a photoinitiator. U.S. Patent Application Publication 2008-0161464 (Marks et al.) discloses a crosslinked polymeric composition as gate dielectric material.
EP 1,679,754A1 (Kim et al.) describes coating a surface of a crosslinked poly(vinyl phenol) gate dielectric with a thin film of fluorine containing polymer. Although OFET device performance may improve in the presence of fluorine containing polymer, the process requires undesirably coating multiple polymer layers. U.S. Pat. No. 7,352,038 (Kelley et al.) describes an OFET comprising a substantially nonfluorinated polymeric layer interposed between a gate dielectric and an organic semiconductor layer.
U.S. Pat. No. 7,528,448 (Bailey et al.) describes a multilayer thermal imaging dielectric donor composition of a dielectric layer comprising one or more dielectric polymers such as acrylic and styrenic polymers and heteroatom-substituted styrenic polymers.
WO2007-129832 (Lee et al.) describes a composition for forming a gate insulating layer of an OFET comprising an acrylate polymer and show mobilities in the range of 0.19-0.25 cm2/V·sec, which are significantly lower than those reported for poly(methyl methacrylate) dielectrics.
While a number of dielectric compositions and materials have been proposed for uses in OFET devices, polymer dielectric materials that work well in p-type or p-channel OFET's usually do not necessarily perform as well with OFET's comprising n-type semiconductors. It has been proposed that the presence of reactive chemical functionalities and dipoles at the semiconductor-polymer dielectric interface have much more significant effect on n-type semiconductors than p-type semiconductors. U.S. Pat. No. 7,638,793 (Chua et al.) describes that for an n-channel or ambipolar OFET the organic gate dielectric layer forming an interface with the semiconductive layer; should have less than 1018 cm−3 bulk concentration of trapping groups, and the use of poly(siloxanes) (for example Cyclotene® polymer), poly(alkenes), and poly(oxyalkylenes) as dielectric materials.
Although various polymer dielectric compositions are known, a number of problems still remain in terms of the process of making such dielectric layers and improving overall performance in OFET's. As discussed before, some the polymer dielectric compositions require coating of multiple layers that is a difficult and costly process. Other examples of dielectric compositions include thermosetting polymers comprising poly(vinyl phenol) as the main component and require a high temperature annealing and crosslinking process. It is difficult to crosslink all phenolic groups during thermal annealing and thus the presence of phenolic groups in dielectric is not desirable.
There are very few polymeric dielectric materials that perform equally well with both hole-transporting (p-type) and electron-transporting (n-type) organic semiconductors. Thus, there is a need for polymer dielectric materials that are soluble in environmentally friendly solvents, easy to apply as a single layer, that exhibit good electrical and insulating properties, and that can be prepared from commercially available polymer or molecular precursors using solution processes at low temperatures and atmospheric pressures. It is also desired that they would be compatible with both p-type and n-type semiconductors, adhere well to various substrates, and be resistant to the absorption of ambient moisture. It is difficult to find polymeric materials that have all of these properties because some polymers will exhibit improvements in some of the properties but exhibit worse effects in others.
With the difficulty in balancing all desired properties in mind, there continues to be research to find useful polymeric dielectric materials.